Managing SMT resource usage through speculative instruction window weighting
نویسندگان
چکیده
منابع مشابه
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. Till recently, the front-end was designed to maximize performance without considering energy consumption. The front-end fetches instructions as fast as it can until it is stalled by a filled issue queue or some other b...
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Current processors require a large number of in-flight instructions in order to look for further parallelism and hide the increasing gap between memory latency and processor cycle time. These in-flight instructions are typically stored in centralized structures called reorder buffer (ROB), which is a centerpiece to handle precise exceptions and recover a safe state in the event of a branch misp...
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Contemporary superscalar processors employ large instruction window to tolerate long latency (mainly second-level cache misses) and explore more instruction level parallelism (ILP); on the one hand, a larger instruction window can buffer larger number of instructions and find more independent instructions to execute, on the other hand, simply scaling instruction window as a unified and single u...
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Simultaneous multi-threading (SMT) has been a very popular design in improving resource utilization by sharing key datapath components among multiple independent threads. When critical resources are shared by multiple threads, to effective use of these resources proves to be the most important factor in fully exploiting the system potential. Allowing any of the threads to overwhelm these shared...
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ژورنال
عنوان ژورنال: ACM Transactions on Architecture and Code Optimization
سال: 2011
ISSN: 1544-3566,1544-3973
DOI: 10.1145/2019608.2019611